CVE-2023-34326 — x86/AMD: missing IOMMU TLB flushing

Description (CNA)

The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.

Affected (CNA)

Vendor / product	Versions
Xen / Xen	unknown consult Xen advisory XSA-442

CWE

No CWE identifiers supplied.

References

https://xenbits.xenproject.org/xsa/advisory-442.html

ADP enrichment

CVE

No English description supplied.

https://xenbits.xenproject.org/xsa/advisory-442.html
http://xenbits.xen.org/xsa/advisory-442.html

CISA-ADP

No English description supplied.

No references supplied.